An instruction set, or instruction set architecture (ISA), describes the aspects of a computer architecture visible to a programmer, including the native datatypes, instructions, registers, addressing modes, memory architecture, interrupt and exception handling, and external I/O (if any).

An ISA is a specification of the set of all binary codes (opcodes) which are the native form of commands implemented by a particular CPU design. The set of opcodes for a particular ISA is also known as the machine language for the ISA.

"Instruction set architecture" is sometimes used to distinguish this set of characteristics from the micro-architecture, which is the set of processor design techniques used to implement the instruction set (including microcode, pipelining, cache systems, and so forth). Computers with different micro-architectures can share a common instruction set. For example, the Intel Pentium and the AMD Athlon implement nearly identical versions of the x86 instruction set, but have radically different internal designs. This concept can be extended to unique ISAs like TIMI present in the IBM System/38 and AS/400. TIMI is an ISA that is implemented as low-level software and functionally resembles what is now referred to as a virtual machine. It was designed to increase the longevity of the platform and applications written for it, allowing the entire platform to be moved to very different hardware without having to modify any software except that which comprises TIMI itself. This allowed IBM to move the AS/400 platform from an older CISC architecture to the newer POWER architecture without having to rewrite any parts of the OS or software associated with it.

When designing micro-architectures, engineers use Register Transfer Language (RTL) to define the operation of each instruction of an ISA.

An ISA can also be emulated in software by a interpreter. Due to the additional translation needed for the emulation, this is usually slower than directly running programs on the hardware implementing that ISA. It is nowadays common practice for vendors of new ISAs or micro-architectures to make software emulators avaiable to software developers before the hardware implementation is ready.

Contents

1 List of ISAs 1.1 ISAs commonly implemented in hardware 1.2 ISAs commonly implemented in software with hardware incarnations 1.3 ISAs never implemented in hardware 2 See also 3 External links

List of ISAs

This list is far from comprehensive as old architectures died out and new ones invented on a continual basis. There is also a plethora of commercially available microprocessors and microcontrollers implementing ISAs in all shapes and sizes. Customized ISAs are also quite common in some applications, e.g. ARC International, application-specific integrated circuit, FPGA, and reconfigurable computing. Also see history of computing hardware.

ISAs commonly implemented in hardware

• Alpha AXP (DEC Alpha)
• ARM (Acorn RISC Machine) (Advanced RISC Machine now ARM Ltd)
• IA-64 (Itanium)
• MIPS
• Motorola 68k
• PA-RISC (HP Precision Architecture)
• IBM POWER
• PowerPC
• SPARC
• SuperH
• System/360
• Tricore (Infineon)
• Transputer (STMicroelectronics)
• VAX (Digital Equipment Corporation)
• x86 (IA-32, Pentium, Athlon) (AMD64, EM64T)

ISAs commonly implemented in software with hardware incarnations

• p-Code (UCSD p-System Version III on Western Digital Pascal Micro-Engine)
• Java virtual machine (ARM Jazelle, PicoJava)
• FORTH

ISAs never implemented in hardware

• SECD machine
• ALGOL Object Code

See also

Categories of ISA

• application-specific integrated circuit (ASIC) fully custom ISA
• CISC
• digital signal processor
• graphics processing unit
• reconfigurable computing
• RISC
• vector processor
• VLIW

Examples of commercially available ISA

• central processing unit
• microcontroller
• microprocessor

Others

• computer architecture
• CPU design
• emulator
• hardware abstraction layer
• Register Transfer Language
• virtual machine

External links

• Mark Smotherman's Historical Computer Designs Page (http://www.cs.clemson.edu/~mark/hist.html)
• John Bayko's Great Microprocessors of the Past and Present (http://www3.sk.sympatico.ca/jbayko/cpu.html)

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