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The Xeon is Intel's current generation of server-class microprocessors for PCs. The first Xeon processor was released in 1998 as the Pentium II Xeon.
The Pentium II Xeon uses either a 440GX or 450NX chipset. In 2000, the Pentium II Xeon was replaced by the Pentium III Xeon.
In 2001, the Pentium III Xeon was replaced with the Intel Xeon processor. The Xeon is based on Intel's NetBurst architecture and is similar to the Pentium 4 CPU.
The latest addition to the Xeon family is the Xeon MP processor, released in 2002, which combined NetBurst with Intel's Hyper-Threading Technology. Its chipsets use
socket 603 and has GC-LE versions for the low end (2 processors, 16Gb memory addressable) and GC-HE for the high end (4 processors or more, 64Gb addressable), all using a 400Mhz bus.
Like Intel's standard x86/IA-32 family of consumer desktop PC processors, the Xeon line of processors are 32-bit. A 64-bit version of the Xeon is planned and will compliment (or potentially replace) Intel's Itanium CPU.
On May 9, 2004, Intel announced that future Xeon processors would be based on the company's Pentium M architecture. Interestingly, the Pentium M is based strongly on Intel's Pentium III architecture, so "new" Xeon may actually be more similar to the Pentium III Xeon than the NetBurst-based Xeons.
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Xeon Processors, Designations, and Characteristics
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| Public Desigination |
Core (Intel Codename) |
CPU Frequency |
Frontside Bus Frequency / Theoretical Bandwidth |
Cache |
Interface |
Additional Features |
| Pentium II Xeon |
Drake |
400MHz-450MHz |
100 MHz / 800MB/s |
16K L1 data + 16K L1 instruction; 512KB/1MB/2MB L2 |
Slot 2 |
N/A |
| Pentium III Xeon |
Tanner |
500MHz-550MHz |
100 MHz / 800MB/s |
16K L1 data + 16K L1 instruction; 512KB/1MB/2MB L2 |
Slot 2 |
Support of SSE instructions and Processor Serial Number |
| Pentium III Xeon |
Cascades |
600MHz-1000MHz |
133 MHz / 1066MB/s |
16K L1 data + 16K L1 instruction; 256KB L2 |
Slot 2 |
On-Die L2 Cache |
| Pentium III Xeon |
Cascades 2MB |
700MHz-900MHz |
100 MHz / 800MB/s |
16K L1 data + 16K L1 instruction; 2MB L2 |
Slot 2 |
Larger L2 cache, and support for more than 2-way configurations |
| Xeon |
Foster |
1400MHz-2000MHz |
100 MHz / 3.2GB/s |
8K L1 data + 12K L1 instruction; 256KB L2 |
Socket 603 |
Based on Pentium 4's Netburst core; supports SSE2 and removes Processor Serial Number |
| Xeon MP |
Foster MP |
1400MHz-1600MHz |
100 MHz / 3.2GB/s |
8K L1 data + 12K L1 instruction; 256KB L2; 512K/1MB L3 |
Socket 603 |
Adds L3 cache, and support for more than 2-way configurations |
| Xeon |
Prestonia |
1600MHz-2800MHz |
100 MHz / 3.2GB/s |
8K L1 data + 12K L1 instruction; 512KB L2 |
Socket 603 |
Supports Hyper-Threading |
| Xeon |
Prestonia |
2000MHz-3060MHz |
133 MHz / 4.2GB/s |
8K L1 data + 12K L1 instruction; 512KB L2 |
Socket 604 |
Faster Front-Side Bus |
| Xeon |
Gallatin |
3060MHz-3200MHz |
133 MHz / 4.2GB/s |
8K L1 data + 12K L1 instruction; 512KB L2; 1MB L3 |
Socket 604 |
Adds 1MB of L3 cache |
| Xeon MP |
Gallatin |
1500MHz-3000MHz |
100 MHz / 3.2GB/s |
8K L1 data + 12K L1 instruction; 512KB L2; 1MB/2MB/4MB L3 |
Socket 603 |
Adds L3 cache, and support for more than 2-way configurations |
| Xeon |
Nocona |
2800MHz-3600MHz |
200 MHz / 6.4GB/s |
16K L1 data + 12K L1 instruction; 1MB L2 |
Socket 604 |
Larger caches; support for SSE3, EM64T and the NX (No eXecute) bit. |
Irwindale
The Irwindale core will be introduced in H1 2005. It will be identical to the Nocona, but with a doubled L2 cache.
See also: List of Intel microprocessors
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