Memory coherence (also cache coherence or cache consistency) is the property of the shared memory systems (multiprocessors and distributed shared memory systems) in which any shared piece of memory (cache line or memory page) gives consistent values with accordance to earlier agreed consistency model despite accesses (maybe parallel) from different nodes (which may be processors in the multiprocessor or computers).

In a single-processor systems, a cache is an effective way to dramatically improve performance. In multiprocessor systems, however, there is a problem when multiple processors cache the same shared data. If one of the processors modifies some piece of data (i.e., performs a "write" operation), then the other processors have an out-of-date copy of this data item stored in their cache; in other words, the cached data has become "stale." A "cache coherency protocol" is used in multiprocessor systems to ensure that cached data remains consistent (also called "coherent.")

Various protocols have been devised for maintaining memory coherency, such as the MESI protocol, MSI protocol, MOSI protocol and the MOESI protocol. Most of the cache protocols in multiprocessors are supporting sequential consistency model.

See also:

• Bus sniffing
• Directory-based coherence protocols