|
In computers and telecommunication, a parity bit is a binary digit that takes on the value zero or one to satisfy the requirement for parity in a binary number. The parity scheme in use must be specified as even or odd. There are several confusing names for these schemes, but there are actually only two schemes.
In serial data transmission, a common format is 7 data bits, an even parity bit (ie, the parity is scheme is even), and one or two stop bits. This format neatly accommodates all the 7-bit ASCII characters. Other formats are possible; 8E2, for instance, can accommodate any of the expanded ASCII character mappings. In serial communication contexts, parity is usually managed by interface hardware (eg, a UART) and, on reception, the result made available to the CPU (and so to, for instance, the operating system) via a status bit in a register in the interface hardware. Retransmission, the usual resort when a parity error is reported, is usually handled by software (eg, the operating system I/O routines).
Parity bits are mainly used as a very simple form of redundancy check. Use of parity allows detection of all single bit errors and some >1 bit errors, but does not include enough information to correct any error.
|
