Sample and hold - Definition and Overview

In electronics, a sample and hold circuit is used to interface real-world, changing analogue signals to a subsequent system such as an analogue to digital converter. The purpose of this circuit is to hold the analogue value steady for a short time while the converter or other following system performs some operation that takes a little time.

In most circuits, a capacitor is used to store the analogue voltage, and an electronic switch or gate is used to alternately connect and disconnect the capacitor from the analogue input. The rate at which this switch is operated is the sampling rate of the system.

The necessity of such a circuit is easy to see if one considers what would happen if it were not present. In some kinds of ADC for example, the input is often compared to a voltage generated internally from a digital-to-analog converter. The circuit tries a series of values, and stops converting once the voltages are "the same" within some defined error margin. If the input value was permitted to change during this comparison process, the resulting conversion would be inaccurate, and possibly completely unrelated to the true input value.

In order that the input voltage is held constant for all practical purposes, it is essential that the capacitor has very low leakage, and that it is not loaded to any significant degree. This calls for a very high input impedance for the following circuit.