Silicon on insulator (SOI) has a layered structure consisting of a thin layer of silicon, from 50 nm to 100 µm, which is separated from the substrate by an insulating layer of silicon dioxide 80 nm thick. This process helps reduce the amount of electrical charge that the transistor has to move during a switching operation, increasing speed (up to 15%) and reducing switching energy (up to 20%) over CMOS-based chips. SOI chips cost more to produce and are generally used for high-end applications.

SOI differs from generic CMOS in that its silicon junction is above an electrical insulator. The advantage is that this insulator reduces the capacitance, meaning the transistor has less to charge-up before completing a switch, which results in reduced switching time.

SOI wafers are produced by two main methods:

SIMOX - Seperation by IMplantaion of OXygen - uses an oxygen ion beam implantation proccess followed by high temperature annealing to create a buried SiO2 layer.

Smartcut is another method that bonds the oxidized surface of two wafers together and then splits most of the top wafer away along a band of implanted Hydrogen bubbles. The thin layer of silicon that is left behind is isolated from the substrate by what was originally the surface oxide layers.

As of 2004 the technology is being gradually adopted by electronics manufacturers. In particular, both Sony and Microsoft plan to use it in production of their next-generation consoles. There are also news that AMD is starting to use SOI in some of its new processors.

A site with extensive information regarding SOI technology: AMDboard (http://www.amdboard.com/soispecial.html)

ja:SOI