Test-and-set - Definition and Overview

In computer science, the test-and-set CPU instruction is a special instruction that atomically tests and modifies the contents of a memory location. It is used to implement semaphores in multiprocessor systems.

In uniprocessor systems, it is sufficient to disable interrupts before accessing a semaphore.

However, in multiprocessor systems, it is impossible and undesirable to disable interrupts on all processors at the same time; and even with interrupts disabled, two or more processors could be attempting to access the same semaphore's memory at the same time. The test-and-set instruction, allows any processor to atomically test and modify a memory location, preventing such multiple processor collisions.

See also

• Fetch-and-add
• Test and Test-and-set
• Load-Link/Store-Conditional

External links

• Description (http://edis.win.tue.nl/sys/test-and-set/) from Encyclopaedia of Delay-Insensitive Systems
• "Wait-free Test-and-Set (http://citeseer.ist.psu.edu/355291.html)" by Yehuda Afek
• int testandset(int *lock) (http://www.cs.clemson.edu/~wayne/cpsc823/threads/testandset.s) - C-callable routine written in Sun Sparc assembly language
• Techniques for mutual exclusion (http://sankofa.loc.edu/chu/web/Courses/Cosi410/Ch2/testset.htm)